Description
Woodward 9905-726 | MicroNet Plus CPU Module Core Category
Dynamic Product Introduction
When a primary control rack throws a fatal watchdog fault during a critical startup sequence, troubleshooting comes down to swapping the core intelligence. The Woodward 9905-726 functions as the computational heart of the MicroNet Plus platform, designed to drive complex industrial turbine management and heavy-duty gas compression logic without missing a single execution cycle. Unlike standard commercial-grade computing hardware, this controller relies on a ruggedized CompactPCI architecture built to survive continuous plant vibration and severe electrical noise.
Moving away from obsolete first-generation MicroNet processors, this specific CPU variant brings improved memory bandwidth and tighter deterministic loop times for multi-loop PID applications. Field integration proves that upgrading or replacing this module restores seamless communication across distributed I/O drop networks while eliminating memory overflow errors common in legacy nodes.
9905-726
Key Technical Specifications
- Processor Architecture: Motorola PowerPC MPC8260 (Embedded 32-bit core)
- System Memory: Dynamic RAM and Flash memory configurations standard for MicroNet Plus boards
- Backplane Interface: CompactPCI (cPCI) bus standard
- Communication Ports: 2x RJ-45 10/100 Ethernet ports, dedicated Serial ports for configuration/service
- Operating System: Real-Time Operating System (RTOS) embedded
- Power Dissipation: Approximately 15W to 20W typical consumption
- Operating Temperature Range: -20°C to +70°C ambient tolerance
- Enclosure Type: Single-slot European subrack plug-in module with front-panel diagnostic LEDs
- Weight: ~0.68 kg (1 lb 8 oz)
- Redundancy Support: Configurable for simplex or dual-modular redundant (DMR) / triple-modular redundant (TMR) architectures
Global Sourcing & Live-Test SOP (Transparency Core)
Deploying legacy or surplus digital controller hardware requires a rigorous, multi-point validation protocol to guarantee zero-defect deployment.
- Inbound Verification: Incoming hardware undergoes traceability audits against OEM manufacturing lot numbers. Visual inspection under magnification checks for pin corrosion, thermal stress on capacitors, and counterfeit component markers.
- Live Simulation: The CPU is inserted into a fully powered MicroNet Plus test rack loaded with standard discrete and analog I/O modules to mimic actual turbine chassis conditions.
- Diagnostics: Technicians execute a full hardware diagnostic suite, testing memory integrity, Ethernet port packet throughput, and CompactPCI backplane communication handshakes. The module is then subjected to a 24-hour thermal soak test under load.
- Final Prep: Once diagnostic logs verify zero checksum errors, the NVRAM is cleared, latest stable application firmware images are verified, and the module is sealed in an anti-static moisture-barrier bag.
The Field Engineer’s Pitfall Guide
❗ Flashing Mismatched Firmware Versions Across Redundant Nodes: Swapping a single CPU into a redundant pair without aligning the exact firmware revision and bootloader version causes split-brain syndromes or persistent synchronization faults. (I’ve seen plants lose two days of commissioning because a replacement CPU ran v4.02 while its mate sat on v4.01.) Always mirror software packages before tying them back to the active bus.
❗ Neglecting Battery Backup and NVRAM State: Forgetting to transfer or replace the internal lithium backup battery before installation can cause loss of volatile configuration parameters upon the next hard power cycle. Always check battery voltage with a digital multimeter prior to racking.
❗ Bending Backplane Pins During Insertion: Forcing a cPCI card at an improper angle can easily deform delicate connector pins inside the chassis backplane. Guide rails must be seated cleanly, and the front panel captive screws must be torqued evenly to ensure proper pin-to-socket mating.
Intent-Driven FAQ
Will I lose my application logic program if I swap this CPU module out?
No, provided the compiled application code and configuration files are stored on the system’s non-volatile storage or downloaded from your engineering workstation (GAP/NETCON software) via the service port. The raw CPU hardware itself executes the binary, but application logic must be synced from your master project file post-installation.
Is the 9905-726 compatible with older, first-generation standard MicroNet chassis?
Generally, the 9905-726 is engineered specifically for the MicroNet Plus platform. Attempting to force-fit or cross-swap it into a legacy non-Plus chassis will cause bus communication failures due to differences in backplane power distribution and memory mapping protocols.
What causes the CPU to enter an indefinite watchdog trip state on bootup?
A watchdog trip typically points to a corrupted boot sector, an invalid application checksum, or a hardware memory fault on the board. If reloading the firmware image via the serial maintenance port fails to clear the fault, internal flash degradation is usually the root cause.
Can this module be hot-swapped while the turbine or compressor is running?
In a strictly configured redundant (DMR/TMR) system, a secondary standby CPU can often be replaced live, provided proper software handoff procedures are followed. However, in a simplex configuration, hot-swapping will immediately drop control, trip the unit, and cause an unscheduled shutdown.
What kind of warranty should I expect when purchasing a surplus 9905-726?
Reputable industrial suppliers typically provide a 1-to-2 year replacement warranty on tested surplus or refurbished stock. Always confirm that your vendor includes a fresh bench-test verification sheet confirming Ethernet port functionality and memory integrity.
